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IC-DI
DUAL SENSOR INTERFACE
Rev C2, Page 1/15 FEATURES o Dual channel switches, configurable for high-side, low-side and push-pull operation o Switches are current limited o Push-pull operation with tristate function o Output current of up to 100 mA per channel o Parallel connection of both channels possible o Channel 1 can be inverted (antivalent output) o Wide supply voltage range of 9 to 30 V o Sensor parameterisation via a feedback channel (up to 30 V) o Switching converters and regulators for 3.3/5 V voltage generation o Error detection with hysteresis with excessive temperature, overload and low voltage o Driver shutdown in the event of error o Error messaging via two open-collector outputs APPLICATIONS o Sensor interface for light barriers and proximity switches, for example
PACKAGES
QFN24 4 mm x 4 mm
BLOCK DIAGRAM
CVH 1 uF ..50 mA LVH 22 uH VH VHL RSET 8.2 k ISET
VBR VCC VCC3 VCC NUVD
BIAS
Undervoltage NOVL Overtemp. Overload VCC3
VBO HS1
Filter and Control Logic CHANN. 1
QCFG1
QP1 QN1 1 nF
IN1 INV1
LS1
LINE
QCFG2
Filter and Control Logic CHANN. 2
HS2
QP2 QN2 1 nF
IN2
LS2
VN
OEN GND
CFO =1
VBR VN
CFI
CFP
Copyright (c) 2008 iC-Haus
http://www.ichaus.com
IC-DI
DUAL SENSOR INTERFACE
Rev C2, Page 2/15 DESCRIPTION IC-DI is a monolithic interface iC with two independent switching channels which enables digital sensors to drive peripheral elements, such as programmable logic controllers (PLC) and relays, for example. The switches can be operated as push-pull, highside or low-side switches using inputs QCFG1 and QCFG2 (open, high and low) and are enabled or disabled via input OEN. They are designed to cope with high driver currents of 100 mA (RSET = 8.2 k), are current limited and also short-circuit-proof in that they shut down should excessive temperature or an overload occur. The output current limit can be set via an external resistor at ISET. The protective overload feature is included here as an integrator so that capacitive loads with low repeat rates can be switched without the protective circuitry cutting in. In the event of excessive temperature an error message is generated immediately. Errors are signalled by two open-collector outputs: NOVL (for excessive temperature and overloads) and NUVD (for low voltage at VBR or voltages VCC and VCC3, generated internally). The output switches are shut down with all types of error. To avoid errors occurring when the device is switched on the outputs remain at high impedance for ca. 50 ms after the low voltage threshold has been exceeded. Sensor interface IC-DI has an integrated switching converter which generates voltages VCC (5 V) and VCC3 (3.3 V) with the aid of two back-end seriesregulators. If only a low current is required inductor LVH may be omitted; the series regulators are then powered directly by VBR. Input INV1 permits the input signal at channel 1 (IN1) to be inverted. The connected sensor can be parameterised using the feedback channel with a high volt input (CFI CFO).
IC-DI
DUAL SENSOR INTERFACE
Rev C2, Page 3/15 PACKAGES QFN24 4 mm x 4 mm to JEDEC Standard
PIN CONFIGURATION QFN24 4 mm x 4 mm
24
23
22
21
20
19
1
18
2
17
3
16
4
5
DI code... ...
15
14
6
13
7
8
9
10
11
12
PIN FUNCTIONS No. Name Function 1 ISET Reference Current for current limitation of driver outputs 2 INV1 Inverting Input Channel 1 3 IN1 Input Channel 1
PIN FUNCTIONS No. Name Function 4 QCFG1 Configuration Input Channel 1 5 QCFG2 Configuration Input Channel 2 6 IN2 Input Channel 2 7 OEN Output Enable Input 8 NOVL Overload Error Output 9 NUVD Undervoltage Error Output 10 CFO Output Feedback Channel 11 CFP Configuration Input Feedback Channel 12 CFI Input Feedback Channel 13 QP2 Output High Side Switch Channel 2 14 QN2 Output Low Side Switch Channel 2 15 VN Reference Voltage Low Side Switch 16 QN1 Output Low Side Switch Channel 1 17 QP1 Output High Side Switch Channel 1 18 VBO Reference Voltage High Side Switch 19 VBR Power Supply switching converter and linear regulators 20 VHL Inductor Switching Converter 21 VH Input Linear Regulators 22 VCC 5 V Sensor Supply 23 VCC3 3.3 V Sensor Supply 24 GND Ground
Pins GND and VN must not be externally connected, otherwise with reverse bias intolerably high current may flow! The Thermal Pad is to be connected to a Ground Plane (VN) on the PCB. Only pin 1 marking on top or bottom defines the package orientation (IC-DI label and coding is subject to change).
IC-DI
DUAL SENSOR INTERFACE
Rev C2, Page 4/15 ABSOLUTE MAXIMUM RATINGS
Beyond these values damage may occur; device operation is not guaranteed. Absolute Maximum Ratings are no Operating Conditions. Integrated circuits with system interfaces, e.g. via cable accessible pins (I/O pins, line drivers) are per principle endangered by injected interferences, which may compromise the function or durability. The robustness of the devices has to be verified by the user during system development with regards to applying standards and ensured where necessary by additional protective circuitry. By the manufacturer suggested protective circuitry is for information only and given without responsibility and has to be verified within the actual system with respect to actual interferences. Item Symbol No. G001 VBO Parameter Power Supply at VBO Conditions Min. Referenced to lowest voltage of VN, VBR, QP1, QN1, QP2, QN2, CFI, VH, VHL Referenced to highest voltage of VN, VBR, QP1, QN1, QP2, QN2, CFI, VH, VHL Referenced to lowest voltage of VN, VBO, QP1, QN1, QP2, QN2, CFI, VH, VHL Referenced to highest voltage of VN, VBO, QP1, QN1, QP2, QN2, CFI, VH, VHL Referenced to lowest voltage of VN, VBO, VBR, QP1, QN1, QP2, QN2, CFI, VHL Referenced to highest voltage of VN, VBO, VBR, QP1, QN1, QP2, QN2, CFI, VHL Referenced to lowest voltage of VN, VBO, VBR, QP1, QN1, QP2, QN2, CFI, VH Referenced to highest voltage of VN, VBO, VBR, QP1, QN1, QP2, QN2, CFI, VH VN < VBO VN > VBO (reverse bias) VN < VBO VN > VBO (reverse bias) Max. 36 -36 -10 600 36 -36 -10 600 36 -36 -5 70 36 -36 -150 -1 -27 -500 -10 -300 -0.3 -50 Referenced to lowest voltage of VN, VBO, VBR, QP1, QN1, QP2, QN2, CFI, VH, VHL Referenced to highest voltage of VN, VBO, VBR, QP1, QN1, QP2, QN2, CFI, VH, VHL; VN < VBO, VBO < 29 V VN < VBO, VBO > 29 V VN > VBO (reverse bias) 5 3 3 500 10 300 7 10 36 V V mA V V mA V V mA V V mA V V mA mA mA V mA V Unit
G002 I(VBO) G003 VBR
Current in VBO Power Supply at VBR
G004 I(VBR) G005 V(VH)
Current in VBR Voltage at VH
G006 I(VH) G007 V(VHL)
Current in VH Voltage at VHL
G008 I(VHL) G009 V(VN) G010 I(VN) G011 I(GND) G012 V() G013 I() G014 V()
Current in VHL Voltage at GND vs. VN Current in VN Current in GND Voltage at VCC, VCC3 Current in VCC, VCC3 Voltage at QP1, QN1, QP2, QN2
-7 -36 -36 -400 400
V V V mA mA V V 4 7 4 7 20 7 4 0.6 150 mA V mA V mA V mA kV C 36
G015 I() G016 I() G017 V(CFI)
Current in QP1, QP2 Current in QN1, QN2 Voltage at CFI Referenced to lowest voltage of VN, VBO, VBR, QP1, QN1, QP2, QN2, CFI, VH, VHL Referenced to highest voltage of VN, VBO, VBR, QP1, QN1, QP2, QN2, CFI, VH, VHL
-36 -4 -0.3 -4 -0.3 -5 -0.3 -4
G018 I(CFI) G019 V() G020 I() G021 V() G022 I() G023 V(ISET) G024 I(ISET) G025 Vd() G026 Tj
Current in CFI Voltage at INV1, QCFG1, QCFG2, IN1, IN2, OEN, CFP Current in INV1, QCFG1, QCFG2, IN1, IN2, OEN, CFP Voltage at NOVL, NUVD, CFO Current in NOVL, NUVD, CFO Voltage at ISET Current in ISET ESD Susceptibility at all pins Operating Junction Temperature HBM, 100 pF discharged through 1.5 k
-40
All voltages are referenced to ground unless otherwise stated. All currents into the device pins are positive; all currents out of the device pins are negative.
IC-DI
DUAL SENSOR INTERFACE
Rev C2, Page 5/15 ABSOLUTE MAXIMUM RATINGS (cont'd)
Item No. Symbol Parameter Storage Temperature Range Conditions Min. -40 Max. 150 C Unit
G027 Ts
THERMAL DATA
Operating Conditions: VBO = 9...30 V, VBR = 9...30 V (both referenced to VN), Tj = -40...125 C, RSET = 8.2 k 1%, unless otherwise stated Item No. T01 T02 Symbol Ta Rthja Parameter Operating Ambient Temperature Range (extended range on request) Thermal Resistance Chip/Ambient Surface mounted, thermal pad soldered to ca. 2 cm heat sink Conditions Min. -40 30 Typ. Max. 85 40 C K/W Unit
All voltages are referenced to ground unless otherwise stated. All currents into the device pins are positive; all currents out of the device pins are negative.
IC-DI
DUAL SENSOR INTERFACE
Rev C2, Page 6/15 ELECTRICAL CHARACTERISTICS
Operating Conditions: VBO = 9...30 V, VBR = 9...30 V (both referenced to VN), Tj = -40...125 C, RSET = 8.2 k 1%, unless otherwise stated Item No. 001 002 003 004 005 006 007 008 009 010 011 Symbol Parameter Conditions Min. VBO I(VBO) VBR I(VBR) Vc()hi Vc()lo Vc()hi Vc()lo Vc(CFI)hi Vc(CFI)lo Vc(VN)hi Permissible Supply Voltage Supply Current in VBO Permissible Supply Voltage Supply Current in VBR Clamp Voltage hi at VBO, VBR vs. VN Clamp Voltage lo at VBO, VBR vs. VN Clamp Voltage hi at QN1, QN2 vs. VN Clamp Voltage lo at QP1, QP2 vs. VN Clamp Voltage hi at CFI vs. VN Clamp Voltage lo at CFI vs. VN Clamp Voltage hi at VN vs. lowest voltage of QP1, QN1, QP2, QN1, CFI Clamp Voltage hi at VH, VHL Clamp Voltage lo at VH, VHL VH connected to VBR, no load, I(VCC) = I(VCC3) = 0, V(OEN) = hi I() = 10 mA I() = -10 mA I() = 1 mA, VBO and VBR > VN I() = -1 mA, VBO and VBR > VN I() = 1 mA I() = -1 mA I() = 1 mA 36 36 -9 36 -36 36 -36 39 -6 Referenced to VN No load, I(QP1) = I(QP2) = 0, HSx switched on 9 24 9 Typ. 24 Max. 30 0.3 30 6 V mA V mA V V V V V V V Unit
Total Device
012 013 014
Vc()hi Vc()lo Vc()hi
I() = 1 mA I() = -1 mA
36 -36 7
V V V
Clamp Voltage hi at VCC, VCC3, I() = 1 mA ISET, INV1, IN1, IN2, QCFG1, QCFG2, OEN, CFO, CFP, NOVL, NUVD Clamp Voltage lo at VCC, VCC3, I() = -1 mA ISET, INV1, IN1, IN2, QCFG1, QCFG2, OEN, CFO, CFP, NOVL, NUVD Propagation Delay IN1 QP1, QN1 IN2 QP2, QN2 VBO < VN (reverse bias) VBO > VN; V(GND) < VN + 0.6V
015
Vc()lo
-0.5
V
016
tpio
2.4
11
s
017 018
R(GND)off Resistance of GND switch R(GND)on Resistance of GND switch
10 20
k
Low-Side Switch QN1, QN2; V(QCFG1) = V(QCFG2) = 0 V 101 Vs()lo Saturation Voltage lo at QN1, RSET = 5.1 k; I() = 100 mA QN2 vs. VN I() = 50 mA I() = 10 mA 102 103 104 105 106 Isc()lo Vol()on Vol()off Vol()hys llk() Short-Circuit Current lo in QN1, QN2 RSET = 8.2 k, V() = 1.4 V...VBO 100 1.55 1.5 0.1 125
1.5 1 0.3 160 2.1 1.8
V V V mA V V V
Overload Detection Threshold on QN1, QN2 lo hi; referenced to GND Overload Detection Threshold off QN1, QN2 hi lo; referenced to GND Overload Detection Threshold Hysteresis Leakage Current at QN1, QN2 Vol()hys = Vol()on - Vol()off OEN = lo; V(QN1, QN2) = VBO...VBO + 6 V V(QN1, QN2) = 0...VBO V(QN1, QN2) = -6...0 V VBO = 30 V, Cl = 2.2 nF V(ISET) = 0 V, QNx > 3 V QNx activated; V(QNx) = -6 V
0 0 -500 195 -10 300
50 50 0 45 450
A A A V/s mA mA
107 108 109
SR() Imax() Ir()
Slew Rate (switch off on) Maximum Current in QN1, QN2 Reverse Current in QN1, QN2
IC-DI
DUAL SENSOR INTERFACE
Rev C2, Page 7/15 ELECTRICAL CHARACTERISTICS
Operating Conditions: VBO = 9...30 V, VBR = 9...30 V (both referenced to VN), Tj = -40...125 C, RSET = 8.2 k 1%, unless otherwise stated Item No. Symbol Parameter Conditions Min. Typ. Max. Unit
High-Side Switch QP1, QP2; V(QCFG1) = V(QCFG2) = 5 V 201 Vs()hi Saturation Voltage hi vs. VBO RSET = 5.1 k; I() = -100 mA I() = -50 mA I() = -10 mA 202 203 204 205 206 Isc()hi Vol()on Vol()off Vol()hys llk() Short-Circuit Current hi RSET = 8.2 k, V() = 0...VBO - 1.5 V Overload Detection Threshold on QP1, QP2 hi lo; referenced to VBO Overload Detection Threshold off QP1, QP2 lo hi; referenced to VBO Overload Detection Threshold Hysteresis Leakage Current at QP1, QP2 Vol()hys = Vol()off - Vol()on OEN = lo; V(QP1, QP2) = -6...0 V V(QP1, QP2) = 0 V...VBO V(QP1, QP2) > VBO...VBO + 6 V VBO = 30 V, Cl = 2.2 nF V(ISET) = 0 V, VBO - QPx > 4 V QPx activated; V(QPx) = VBO...VBO + 6 V Permanent overload (see Fig. 1)
-1.2 -0.7 -0.3 -160 -2.1 -1.8 0.1 -125 -100 -1.5 -1.4
V V V mA V V V
-500 -40 0 -630 -450
0 0 500 40 -350 1
A A A V/s mA mA s ms
207 208 209 301 302
SR() Imax() Ir() toldly tolcl
Slew Rate (switch off on) Maximum Current in QP1, QP2 Reverse Current in QP1, QP2 Time to Overload Message (NOVL 1 0, switch tri-state)
Short-Circuit/Overload Monitor 126 35 180 50 280 80
Time to Overload Message Reset No overload (see Fig. 2) (NOVL 0 1, switch active) Turn-On Threshold VBR Turn-Off Threshold VBR Hysteresis Time to Undervoltage Message (NUVD 1 0, switch tri-state) Time to Undervoltage Message Reset (NUVD 0 1, switch active) Overtemperature Shutdown (NOVL 1 0, switch tri-state) Overtemperature Shutdown Reset Delay (NOVL 0 1, switch active) Input Threshold Voltage hi at IN1, IN2, INV1, OEN Input Threshold Voltage lo at IN1, IN2, INV1, OEN Hysteresis at IN1, IN2, INV1, OEN Pull-Down Current at IN1, IN2, INV1 Pull-Down Current at OEN Input Threshold hi at QCFG1, QCFG2 (V() > Va()hi QN1, QN2 tri-state) Vt()hys = Vt()hi - Vt()lo V() = 0.4 V...Vt()lo V() > Vt()hi V(OEN) > 0.4 V Referenced to VCC3 (see Fig. 3) Referenced to GND Decreasing voltage VBR VBRhys = VBRon - VBRoff Permanent undervoltage at VBR, VCC or VCC3 No undervoltage at VBR, VCC and VCC3 (see Fig. 1)
VBR Voltage Monitor 401 402 403 404 405 VBRon VBRoff VBRhys tuvdly tuvcl 8 7.3 200 15 35 50 500 100 80 9 8.5 V V mV s ms
Temperature Monitor 501 502 Toff ton Increasing temperature Tj Temperature Tj < Toff 130 35 50 155 80 C ms
Inputs IN1, IN2, INV1, QCFG1, QCFG2, OEN 601 602 603 604 605 606 Vt()hi Vt()lo Vt()hys Ipd() Ipd(OEN) Vahi() 2 0.8 300 30 10 1 52 64 500 168 40 6 69 V V mV A A A %
607
Vahi()hys
Hysteresis hi at QCFG1, QCFG2 Referenced to VCC3 (see Fig. 3) (V() < Vahi() - Vahi()hys QN1, QN2 active)
3
7
%
IC-DI
DUAL SENSOR INTERFACE
Rev C2, Page 8/15 ELECTRICAL CHARACTERISTICS
Operating Conditions: VBO = 9...30 V, VBR = 9...30 V (both referenced to VN), Tj = -40...125 C, RSET = 8.2 k 1%, unless otherwise stated Item No. 608 Symbol Valo() Parameter Input Threshold lo at QCFG1, QCFG2 (V() < Va()lo QP1, QP2 tri-state) Conditions Min. Referenced to VCC3 (see Fig. 3) 24 Typ. 29 Max. 34 % Unit
609
Valo()hys
Hysteresis lo at QCFG1, QCFG2 Referenced to VCC3 (see Fig. 3) (V() > Valo() + Valo()hys QN1, QN2 active) Open Circuit Voltage at QCFG1, Referenced to VCC3 QCFG2 Internal Resistance at QCFG1, QCFG2 Permissible Spurious Pulse Width at IN1, IN2, INV1, OEN Required Pulse Width at IN1, IN2, INV1, OEN Permissible Spurious Pulse Width at QCFG1, QCFG2 No activity triggered Activity triggered No activity triggered
3
7
%
610 611 612 613 614 615
Vpp() Ri() tsup ttrig tsup ttrig
42 40
46.5 85
51 190 2.2
% k s s
7 4.5 14
s s
Required Pulse Width at QCFG1, Activity triggered QCFG2 Saturation Voltage lo Short Circuit Current lo Leakage Current I() = 1.0 mA V() = 0.4 V...VCC V() = 0 V...VCC, no error VBR < 18 V VBR < 18 V VBR > 18 V VBR > 18 V Vt(CFI)hys = Vt(CFI)hi - Vt(CFI)lo CFP = hi, V(CFI) = 0...VBR - 3 V, V(CFI) > Vt(CFI)lo CFP = lo, V(CFI) = 3 V...VBR, V(CFI) < Vt(CFI)lo V(CFO) = 10 90%VCC I(CFO) = 1.2 mA V(CFO) = 0.4 V...VCC V(CFO) = 0 V...VCC, CFO inaktive
Error Output NOVL, NUVD 701 702 703 801 802 803 804 805 806 807 808 809 810 811 812 813 814 815 816 817 818 819 820 Vs()lo Isc()lo Ilk() 0.4 1.2 -10 59 44 10.5 8 1 -300 40 2.4 1.2 -10 -40 300 11 0.4 25 10 2 0.8 Vt(CFP)hys = Vt(CFP)hi - Vt(CFP)lo V(CFP) = 0.4 V...Vt(CFP)lo V(CFP) > Vt(CFP)hi No activity triggered Activity triggered No activity triggered Activity triggered CFP = lo, V(CFI) = 3 V...VBR, OEN = lo 14 20 7 4.5 300 30 10 500 168 40 2.2 66 50 11.3 9 25 10 74 56 12 10.5 V mA A %VBR %VBR V V V A A s V mA A V V mV A A s s s s A
Feedback Channel CFI to CFO Vt1(CFI)hi Input Threshold 1 hi at CFI Vt1(CFI)lo Input Threshold 1 lo at CFI Vt2(CFI)hi Input Threshold 2 hi at CFI Vt2(CFI)lo Input Threshold 2 lo at CFI Vt()hys Ipu(CFI) Ipd(CFI) tpcf Vs()lo Isc()lo Ilk() Vt()hi Vt()lo Vt()hys Ipd(CFP) tsup ttrig tsup ttrig Ipd(CFI)+ llk(QPx) VHn Hysteresis at CFI Pull-Up Current at CFI Pull-Down Current at CFI Propagation Delay CFI CFO Saturation Voltage lo at CFO Short Circuit Current lo in CFO Leakage Current at CFO Input Threshold Voltage hi at CFP Input Threshold Voltage lo at CFP Hysteresis at CFP Pull-Down Current at CFP Permissible Spurious Pulse Width at CFI Required Pulse Width at CFI Permissible Spurious Pulse Width at CFP Required Pulse Width at CFP Pull-Down Current at CFI plus leakage current at QPx Nominal Voltage at VH
Switching Regulator VHL, VH 901 LVH = 22 H, Ri(LVH) < 1.1 , CVH = 1 F; I(VH) = 0...50 mA 6.4 7.7 V
IC-DI
DUAL SENSOR INTERFACE
Rev C2, Page 9/15 ELECTRICAL CHARACTERISTICS
Operating Conditions: VBO = 9...30 V, VBR = 9...30 V (both referenced to VN), Tj = -40...125 C, RSET = 8.2 k 1%, unless otherwise stated Item No. 902 903 904 905 906 Symbol Ia(VHL) Va(VH) Va()hys Vs(VHL) Vf(VHL) Parameter max. DC Cut-Off Current from VHL Cut-Off Voltage at VH Hysteresis at VH Saturation Voltage at VHL vs. VBR Forward Voltage of Fly-Back Diode Leakage Current at VHL I(VHL) = -50 mA I(VHL) = -150 mA Vf() = V(GND) - V(VHL); I(VHL) = -50 mA I(VHL) = -150 mA VHL = lo, V(VHL) = V(VH) -20 70 Va(VH) > VHn Conditions Min. -200 6.5 10 7.3 25 7.7 150 1.1 3.0 1.5 2.9 20 Typ. Max. mA V mV V V V V A % Unit
907 908
Ilk(VHL) VH
Efficiency of VH-switching regula- I(VH) = 50 mA, Ri(LVH) < 1.1 , tor V(VBR) = 12...30 V Nominal Voltage at VCC Required Capacitor at VCC vs. GND Maximum Permissible Internal Resisitance of capacitor at VCC VCC Monitor Threshold hi VCC Monitor Threshold lo Hysteresis Nominal Voltage at VCC3 Required Capacitor at VCC3 vs. GND Maximum Permissible Internal Resisitance of capacitor at VCC3 VCC3 Monitor Threshold hi VCC3 Monitor Threshold lo Hysteresis Oscillator Frequency Tj = 27 C Decreasing Voltage at VCC3 VCC3hys = VCC3on - VCC3off Decreasing Voltage at VCC VCChys = VCCon - VCCoff I(VCC3) = -50...0 mA, VH = VHn I(VCC) = -50...0 mA, VH = VHn
Series Regulator VCC A01 A02 A03 A04 A05 A06 B01 B02 B03 B04 B05 B06 VCCn CVCC RiCVCC VCCon VCCoff VCChys VCC3n CVCC3 RiCVCC3 VCC3on VCC3off VCC3hys 4.75 150 1 90 83 50 3.1 150 1 90 83 50 1.2 1.5 1.16 -1.1 150 2 2.75 2.3 1.28 -0.25 98 95 150 3.3 3.5 99 95 5 5.25 V nF %VCCn %VCCn mV V nF % VCC3n % VCC3n mV MHz MHz V mA
Series Regulator VCC3
Oscillator C01 fos
Reference and Bias D01 V(ISET) D02 I(ISET) D03 rIbeg Voltage at ISET Current in ISET Transmission Ratio for driver output current limitation Tj = 27 C V(ISET) = 0 V, Tj = 27 C Imax(QP1) = Imax(QP2) = Imax(QN1) = Imax(QN2) = I(ISET) rIbeg, RSET = 5.1...20 k 1.22 -0.65 800
IC-DI
DUAL SENSOR INTERFACE
Rev C2, Page 10/15 DESCRIPTION OF FUNCTIONS Overload detection To protect the device against excessive power dissipation due to high currents the switches are clocked if an overload occurs. If a short circuit is detected, i.e. if the voltage at the switch output overshoots or undershoots Overload Detection Threshold off (cf. Electrical Characteristics Nos. 104 and 204), the switches are shut down for a typical 50 ms (cf. Electrical Characteristics No. 302) and the current flow thus interrupted.
VBR NUVD NOVL OEN
tion. This integrator is an 8-bit counter which is updated together with the oscillator clock. If an overload is detected on one channel the counter is raised by 1; an overload on both channels increases the counter value by 2. If no overload is apparent the counter is reduced by 1 every 10 clock pulses. Provided that the time during which excessive current flows does not exceed the value stipulated by Electrical Characteristics No. 301, a maximum duty cycle - without deactivation of the switches - of 1:10 results if one channel is overloaded; if both channels signal an overload this changes to 1:5. Only when these ratios are exceeded can the counter achieve its maximum value, this then generating an error message at NOVL and deactivating the switches. Configuring the switches The various functions of the switches are determined by pins QCFG1 and QCFG2. A voltage at the QCFG pins which is lower than Va()lo deactivates the relevant high-side switches; with a voltage higher than Va()hi the relevant low-side switches are deactivated. Both high-side and low-side switches are activated in the open-circuit voltage range (pin open).
Qyx tuvcl toldly tolcl
Figure 1: Permanent short circuit The level of power dissipation is dependent on the current and the time during which this current flows. A current which fails to trigger the overload detection is not critical; high current can also be tolerated for a short period and with low repeat rates. This is particularly important when switching capacitive loads (charge/discharge currents).
VBR NUVD NOVL OEN INx Qyx
Off
Valo()hys
QPx active
QNx active
Vahi()hys
Valo()
Vahi()
V(QCNFx)
Integrator
tuvcl
tolcl
Figure 3: Levels at QCFG1/QCFG2 and switch activation Pull-up and pull-down currents The pull-down currents at pins IN1, IN2, INV1 and CFP are two-stage with switching thresholds Vt()hi and Vt()lo (cf. Electrical Characteristics Nos. 604 and 815).
Figure 2: Overload So that this is possible a shared back-end integrator follows the switches for the purpose of overload detec-
IC-DI
DUAL SENSOR INTERFACE
Rev C2, Page 11/15 Function tables CHANNEL 2 IN2 QCFG2 OEN QN2 QP2 X X L off off L Z H on off H Z H off on L H H off off H H H off on L L H off off H L H on off Table 2: Function table Channel 2 FEEDBACK CHANNEL CFI CFP CFO H H Z H L L L H L L L Z Table 3: Function table Feedback Channel
CHANNEL 1 IN1 QCFG1 INV OEN QN1 QP1 X X X L off off L Z L H on off Z L H off on H L Z H H off on H Z H H on off L H L H off off H H L H off on L H H H off on H H H H off off L L L H off off H L L H on off L L H H on off H L H H off off Table 1: Function table Channel 1
IC-DI
DUAL SENSOR INTERFACE
Rev C2, Page 12/15 APPLICATION NOTES Figure 4 shows recommended protective circuitry against reverse bias and transients on the transmission line; suggested values as follows: DVN: General purpose diode, high reverse voltage 50 5 > 20
CQx: CVB: CVBO:
22 nF 1 F 100 nF
RCFI: RQxx: RVB:
DQx, DVBO: High speed diodes (eg. BAS16)
CVH 1uF ..50mA VH LVH 22uH VHL RSET
Pins GND and VN must not be externally connected, otherwise with reverse bias intolerably high current may flow!
ISET
VCC CVCC VCC3 CVCC3 NUVD Undervoltage NOVL Overtemp. Overload BIAS
VBR
VCC3
VCC
VBR
RVB
VCC3 VBO PRG1 HS1 QP1 RQP1 QN1 LS1 RQN1 DVBO VCC3 CQ1 PRG2 HS2 QP2 RQP2 QN2 LS2 OEN RQN2 VN DVN GND VN>VBO DQ2 M Q2 DQ1 CVBO Q1 UB
IN1 POL1
IN2
CHANN. 2
CHANN. 1
CFO =1 CFP
VBR VN
CFI
RCFI CFI
Figure 4: Recommended external protective circuitry for differential push-pull operation
IC-DI
DUAL SENSOR INTERFACE
Rev C2, Page 13/15 DEMO BOARD iC-DL comes with a demo board for test purposes. Figures 5 and 6 show both the schematic and the component side of the demo board.
VH C4 1uF VH L1 22uH VHL VHL
VCC VCC3 D6 RD D5 RD C6 100nF C5 100nF VCC3
VCC
U1 IC-DI 22 VCC 23 VCC3 9 NUVD
21 VH
20 VHL VBR 19 C3 1uF VNI VBO 18 QP1 17 R5 QP1 QN1 R7 QP2 QN2 4.7 R8 4.7 4.7 R6 4.7 VBR C2 100nF
R1 22 C1 100nF
VB BAS16_02L D1
R3 1k NUVD NOVL
R2 1k NUVD
DCDC CONVERTER UVolt TEMP LOAD
VB
NOVL PRG1 IN1 INV1 PRG2 IN2 OEN CFO CFP ISET R4 8.2k
8 NOVL
PRG1 IN1 INV1 PRG2 IN2 OEN CFO CFP
4 PRG1 3 IN1 2 INV1 5 PRG2 6 IN2 7 OEN 10 CFO 11 CFP 1 ISET BIAS GND 24 =1 VBR VN CHANNEL2 CHANNEL1
VQ1 C7 22nF BAS16_02L D2 VQ2 C8 22nF VNI BAS16_02L D3
VQ1
QN1 16
QP2 13 QN2 14 VN 15
VQ2
C9 4.7nF CFI 12 CFI_I
R9 1k
CFI
CFI
VNI EPAD
D4 BYS10-45
VN
VN
GND
GND
Figure 5: Schematic of the demo board
Figure 6: Demo board (component side)
IC-DI
DUAL SENSOR INTERFACE
Rev C2, Page 14/15
This specification is for a newly developed product. iC-Haus therefore reserves the right to change or update, without notice, any information contained herein, design and specification; and to discontinue or limit production or distribution of any product versions. Please contact iC-Haus to ascertain the current data. Copying - even as an excerpt - is only permitted with iC-Haus approval in writing and precise reference to source. iC-Haus does not warrant the accuracy, completeness or timeliness of the specification on this site and does not assume liability for any errors or omissions in the materials. The data specified is intended solely for the purpose of product description. No representations or warranties, either express or implied, of merchantability, fitness for a particular purpose or of any other nature are made hereunder with respect to information/specification or the products to which information refers and no guarantee with respect to compliance to the intended use is given. In particular, this also applies to the stated possible applications or areas of applications of the product. iC-Haus conveys no patent, copyright, mask work right or other trade mark right to this product. iC-Haus assumes no liability for any patent and/or other trade mark rights of a third party resulting from processing or handling of the product and/or any other use of the product. As a general rule our developments, IPs, principle circuitry and range of Integrated Circuits are suitable and specifically designed for appropriate use in technical applications, such as in devices, systems and any kind of technical equipment, in so far as they do not infringe existing patent rights. In principle the range of use is limitless in a technical sense and refers to the products listed in the inventory of goods compiled for the 2008 and following export trade statistics issued annually by the Bureau of Statistics in Wiesbaden, for example, or to any product in the product catalogue published for the 2007 and following exhibitions in Hanover (Hannover-Messe). We understand suitable application of our published designs to be state-of-the-art technology which can no longer be classed as inventive under the stipulations of patent law. Our explicit application notes are to be treated only as mere examples of the many possible and extremely advantageous uses our products can be put to.
IC-DI
DUAL SENSOR INTERFACE
Rev C2, Page 15/15 ORDERING INFORMATION
Type IC-DI
Package QFN24 4 x 4 mm Evaluation Board
Order Designation IC-DI QFN24 IC-DI EVAL DI1D
For technical support, information about prices and terms of delivery please contact: iC-Haus GmbH Am Kuemmerling 18 D-55294 Bodenheim GERMANY Tel.: +49 (61 35) 92 92-0 Fax: +49 (61 35) 92 92-192 Web: http://www.ichaus.com E-Mail: sales@ichaus.com
Appointed local distributors: http://www.ichaus.de/support_distributors.php

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